This paper presents a novel Convolutional Neural Network (CNN) FPGA architecture designed to perform processing of radio data in a streaming manner without interruption. The proposed architecture is evaluated for radio modulation classification tasks implemented on an AMD RFSoC 2x2 development board and operating in real-time. The proposed architecture leverages optimisation such as the General Matrix-to-Matrix (GEMM) transform, on-chip weights, fixed-point arithmetic, and efficient utilisation of FPGA resources to achieve constant processing of a stream of samples. The performance of the proposed architecture is demonstrated through accuracy results obtained during live modulation classification, while operating at a sampling frequency of 128 MHz before decimation. The proposed architecture demonstrates promising results for real-time, time-critical CNN applications.
@inproceedings{maclellan2023,author={Maclellan, Andrew and Crockett, Louise H. and Stewart, Robert W.},booktitle={2023 21st IEEE Interregional NEWCAS Conference (NEWCAS)},title={Streaming Convolutional Neural Network FPGA Architecture for RFSoC Data Converters},year={2023},volume={},number={},pages={1-5},keywords={Wireless communication;Transforms;Receivers;Throughput;Real-time systems;System-on-chip;Convolutional neural networks;deep learning;wireless communications;FPGA;RFSoC;PYNQ;modulation classification.},doi={10.1109/NEWCAS57931.2023.10198198},issn={2474-9672},month=jun,}
2019
FPGA Accelerated Deep Learning Radio Modulation Classification Using MATLAB System Objects & PYNQ
Andrew Maclellan , Lewis McLaughlin , Louise Crockett , and 1 more author
In 2019 29th International Conference on Field Programmable Logic and Applications (FPL) , Sep 2019
Floating point Convolutional Neural Networks(CNNs) are computationally expensive and deeper networks can be impractical to deploy on FPGAs - consuming a large number of resources and power, as well as having lengthy development times. Previous work has shown that CNNs can be quantised heavily using fixed point arithmetic to combat this without significant loss in classification accuracy. We aim to quantize an existing CNN architecture for radio modulation classification to 2-bit weights and activations, while retaining a level of accuracy close to the original paper, for deployment on a Zynq System on Chip (SoC). To improve the development time for hardware synthesisable CNNs, we make use of MATLAB System Objects and HDL Coder. The PYNQ framework is presented as a practical means for accessing the functionality of the CNN. Our preliminary results show a high classification accuracy even with 2-bit weights and activations.
@inproceedings{maclellan2019,author={Maclellan, Andrew and McLaughlin, Lewis and Crockett, Louise and Stewart, Robert},booktitle={2019 29th International Conference on Field Programmable Logic and Applications (FPL)},title={FPGA Accelerated Deep Learning Radio Modulation Classification Using MATLAB System Objects & PYNQ},year={2019},volume={},number={},pages={246-247},keywords={Field programmable gate arrays;Modulation;Matlab;Hardware design languages;Training;Biological neural networks;CNN;FPGA;quantised;modulation classification;radio;PYNQ;System Objects},doi={10.1109/FPL.2019.00045},issn={1946-1488},month=sep,}